Generally, a semiconductor element available for high power application of several watts or higher is referred to as a power semiconductor element. Specific on-resistance and a blocking voltage of the power semiconductor element are in a trade-off relationship determined by a band gap of a substrate material. Therefore, in order to exceed performance of a silicon (Si) element widely used as the power semiconductor element, a substrate material having a larger band gap than silicon can advantageously be used. Particularly, silicon carbide (SiC) has advantages that the band gap is about three times larger than that of silicon, both p-type and n-type conductivities can be easily achieved, and an oxide film can be formed by thermal oxidation, and therefore, is attracting increasing attention as a promising material for a high performance metal insulator semiconductor field effect transistor (MISFET).
However, the oxide film formed over the silicon carbide substrate has a significant problem. That is, when silicon carbide is subjected to thermal oxidation, carbon remains in the oxide film to form a high-density interface state. This causes significant degradation in channel mobility and significant increase in the specific on-resistance of the MISFET. The carbon remaining in the oxide film also causes degradation in reliability of the oxide film and seriously hinders achievement of the MISFET.
A junction field effect transistor (FET) is a semiconductor element having a structure that solves the problem of the interface of the oxide film. The junction FET is a type of an element using a pn junction as a gate to control a channel. As in a case where silicon is used as a base material, generally, the junction FET is a normally-on type, which is off-state only when a negative voltage is applied to the gate. Note that, since the normally-on type power semiconductor element only has a limited variety of applications for fail-safe reasons, a normally-off type power semiconductor element is generally desirable.
The normally-off type junction FET made of silicon cannot have a high blocking voltage. However, a normally-off type junction FET made of silicon carbide can have the high blocking voltage by reducing a channel. This is because the pn junction in silicon carbide has a high built-in potential of about 2.5V, and therefore, the channel can be closed even if a negative voltage is not applied to the gate.
As described above, a normally-off type high-performance element free from the problem of the interface state of the oxide film can be provided by the junction FET made of silicon carbide as a base material. Note that, an example of such a normally-off type silicon-carbide junction FET is disclosed in Japanese Patent Application Laid-Open Publication No. 2004-134547 (Patent Document 1).
On the other hand, for the power semiconductor element made of silicon carbide as a base material, a buried channel structure has been proposed as a means for avoiding the problem of the gate oxide film while maintaining the MIS structure. FIG. 26 is a cross-sectional view showing a structure of a buried channel MISFET. A reference symbol 30 denotes an n+ substrate forming a drain region, a reference symbol 29 denotes an n− layer forming a drift region, a reference symbol 28 denotes a p layer forming a body region, a reference symbol 27 denotes a p+ layer forming a lead of the body, a reference symbol 26 denotes an n+ layer forming a source region, a reference symbol 31 denotes a buried n layer, a reference symbol 32 denotes an oxide film (a gate insulating film), a reference symbol 34 denotes a gate electrode, a reference symbol 33 denotes a source electrode, and a reference symbol 35 denotes a drain electrode.
In an ordinary MISFET, a channel is formed in an interface between the p layer 28 forming the p body region and the oxide film 32. However, in the structure shown in FIG. 26, the thin buried n layer 31 is inserted between the p layer 28 forming the p body region and the oxide film 32, thereby locating the channel at a distance from the interface with the oxide film 32. As a result, carriers flowing through the channel are less affected by the interface state, and therefore, the channel mobility is improved. Note that, an example of the buried channel structure is disclosed in “1.8 mΩcm2, 10 A Power MOSFET in 4H-SiC”, Proceedings of International Electron Device Meeting 2006 (Non-Patent Document 1).